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Hasil Pencarian

Ditemukan 13 dokumen yang sesuai dengan query
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Bhasker, J.
A VHDL primer / J. Bhasker
New Jersey: Prentice-Hall, 1992
621.392 BHA v
Buku Teks  Universitas Indonesia Library
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Petrus Mursanto
Perancangan Library Pemroses Aritmetis (Arithmetic Unit) dalam VHDL
" Telah banyak usaha yang dilakukan untuk menyederhanakan proses implementasi suatu algoritma ke dalam rangkaian digital, yang sering disebut sebagai Application Specific Integrated Circuit (ASIC). Selain ringkas dan menjadi makin modular, rangkaian digital juga menjanjikan proses yang lebih cepat dibandingkan dengan eksekusi algoritma yang dijalankan oleh general purpose processor (GPP). Sebuah aigoritma yang dieksekusi oleh GPP harus dipecah-pecah terlebih dahulu menjadi serangkaian intruksi primitif yang dimengerti oleh GPP. Waktu proses total adalah hasil akumulasi delay pada ... "
Depok: Fakultas Ilmu Komputer Universitas Indonesia, 2002
LP-pdf
UI - Laporan Penelitian  Universitas Indonesia Library
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LaMeres, Brock J.
Introduction to logic circuits & logic design with VHDL
" This textbook introduces readers to the fundamental hardware used in modern computers. The only pre-requisite is algebra, so it can be taken by college freshman or sophomore students or even used in Advanced Placement courses in high school. This book presents both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). This textbook enables readers to design ... "
Switzerland: Springer Nature, 2019
e20509101
eBooks  Universitas Indonesia Library
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Sibarani, Evita Marlinang
Formalisasi dan verifikasi protokol komunikasi
Depok: Fakultas Ilmu Komputer Universitas Indonesia, 1997
S26978
UI - Skripsi Membership  Universitas Indonesia Library
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Computer hardware description languages and their applications : proceedings of the IFIP TC-10 Fifth International Conference on Computer Hardware Description Languages and Their Applications / editor, M. Breuer ; R. Hartenstein
Amsterdam: North Holland, 1981
621.391 COM
Buku Teks  Universitas Indonesia Library
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Ciletti, Michael D.
Advanced digital design with the Verilog HDL
Boston : Prentice-Hall, 2011
621.395 CIL a
Buku Teks  Universitas Indonesia Library
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Spear, Chris
Systemverilog for verification: a guide to learning the testbench language features
" Systemverilog for verification : a guide to learning the testbench language features teaches all verification features of the SystemVerilog language, providing hundreds of examples to clearly explain the concepts and basic fundamentals. In the third edition, authors Chris Spear and Greg Tumbush start with how to verify a design, and then use that context to demonstrate the language features, including the advantages and disadvantages of different styles, allowing readers to choose between alternatives. This ... "
New York: [, Springer], 2012
e20418474
eBooks  Universitas Indonesia Library
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LaMeres, Brock J.
Introduction to logic circuits & logic design with verilog
" This textbook for courses in Digital Systems Design introduces students to the fundamental hardware used in modern computers. Coverage includes both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). Using this textbook enables readers to design digital systems using the modern HDL approach, but they have a broad foundation of knowledge of the underlying hardware and theory of their designs. ... "
Switzerland: Springer Nature, 2019
e20509097
eBooks  Universitas Indonesia Library
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Riyanto
Perancangan VLSI 0.25 μm dengan desain hybrid VHDL berbasis FPGA Xilinx Spartan 3 untuk CPU ocean bottom unit Tsunami Early Warning System = VLSI design 0.25 μm of a hybrid design with VHDL Xilinx Spartan 3 FPGA-based for ocean bottom unit CPU Tsunami Early Warning System
" Perancangan VLSI dengan hybrid VHDL merupakan metode desain untuk menghasilkan Sistem On Chip yang berbasis FPGA Xilinx Spartan 3. Sistem yang di desain adalah arsitektur CPU yang terdapat di Ocean Bottom Unit (OBU) Tsunami Early Warning System. Proses desain di implementasikan pada FPGA board Xilinx Spartan 3. Perancangan VLSI CPU OBU dengan metode hybrid VHDL di lakukan dengan urutan proses desain yaitu membuat kode VHDL untuk menyimpan data pengukuran dan mengolah dengan algoritma mofjeld, Mengubah ... "
Depok: Fakultas Teknik Universitas Indonesia, 2012
T40836
UI - Tesis Open  Universitas Indonesia Library
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Elliott, John P.
Understanding behavioral synthesis : a practical guide to high-level design
Boston: Kluwer Academic, 1999
621.381 5 ELL u
Buku Teks  Universitas Indonesia Library
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